Barkhausen Institut: Trustworthy Platform Chips by the Barkhausen Institut

Trustworthy Platform Chips

The Barkhausen Institut (BI) develops digital platform chips that form the core of modern, intelligent, and connected electronics. The Scalable Computing Hardware team covers every stage in-house - from concept and physical chip design to full system commissioning. This includes the development of industry-ready, standardized packages and dedicated carrier boards for operation.

BI’s digital platform chips serve as the control and communication center in a wide range of applications: they integrate processors, interfaces, and memory, enabling advanced tasks such as machine learning, real-time control, or AI directly on the device. Use cases span robotics, automotive, industrial automation, and advanced sensor systems.

Layout of mikrochip showing labeled sections tileBoom, tileRocket0, tileRocket1, tileRocket2, TER_top, DBYTE_0, and DBYTE_1 with interconnected pathways — layer of the chip "Masur24" © Barkhausen Institut

Detailed layout of a platform chip showing complex circuit pathways and multiple rectangular sections — layer of the chip "Masur24" © Barkhausen Institut

3D perspective view of a platform chip showing layered circuit pathways in red, green, and purple over a gray base structure — 3D-Ansicht des Plattform Chips "Masur25" © Barkhausen Institut

Waveform simulation showing measured signals of a network card during operation with multiple signal lines and timing markers — measured signals of a network card © Barkhausen Institut

2D layout of a carrier board showing component placements and circuit traces — 2D layout of a carrier board © Barkhausen Institut

The BI has extensive experience and expertise in structuring, developing, and integrating customer-specific IP blocks - ranging from AI accelerators and security modules to complex multiprocessor system-on-chip architectures (MPSoC). The researchers at BI draw on experience from more than 50 successfully completed chip design projects, including numerous industrial collaborations.

Platform chips developed at BI represent technological sovereignty, flexibility, and reliability. They are essential for a competitive, innovative, and independent microelectronics sector in Germany and Europe.

Chips Developed at the Barkhausen Institut

The chips developed at the Barkhausen Institut stand for trustworthy hardware in the field of complex Multiprocessor System-on-Chip (MPSoC) architectures. They are designed specifically for safety-critical applications such as communication, sensor technology, and industrial automation.

Thanks to fast fabrication and commissioning, new customer-specific IP blocks can be quickly evaluated in real silicon. The complete testing and evaluation infrastructure is located at the institute, enabling close feedback between development and practical validation.

The “Masur” chip series developed at the Barkhausen Institut takes its name from Kurt Masur, the renowned conductor from Saxony. A key feature of the Masur chips is the close integration of the secure M³ operating system with the hardware. Interdisciplinary teams from hardware and software development work hand in hand to achieve the highest standards of security and reliability.

Hand holding a black circuit board with multiple connectors and components, next to a small gold-colored platform chip labeled 'MASUR 2023' from Barkhausen Institut — © Barkhausen Institut

Kachel1

Digital multiprocessor chip focused on executing distributed applications
Template for the BI’s security-centric platform chip line
Collaboration between TU Dresden (TUD) and BI
Result of more than 15 years of chip development at TUD

Masur23

Transfer of TUD’s core chip development team to BI
Reorientation of the Kachel1 platform into the security-focused Masur platform
Based on open-source RISC-V processor cores
First chip featuring a BI-developed security component, the Trusted Communication Unit (TCU)
Fabricated using GlobalFoundries’ 22nm technology in Dresden
Design-to-test cycle of approx. 9-12 months
Integration of multiple processors with security mechanisms on a single chip

Masur24

Digital platform chip (System-on-Chip)
Supports the M³ operating system developed at BI’s Composable Operating Systems research group, focusing on security through isolated components and verifiable Trusted Communication Units (TCU)
Focus on security research in multiprocessor architectures (MPSoCs)
Integration of application-specific compute modules and accelerators for cryptographic algorithms
Integration of a memory interface for connecting external DDR memory chips

Masur25

Advanced digital chip generation
Focus on optimizing the architecture and integrating specialized IP blocks to increase security and scalability
Integration of modules from external partners (University of Tübingen), such as AI accelerators and camera interfaces
Standalone operation; capable of booting without assistance from a laboratory computer

MASUR microchip with central square and circuit lines, labeled 'Barkhausen Institut' — © Barkhausen Institut

Masur26 (in progress)

Optimization of on-chip communication structures; improvements to the Network-on-Chip (NoC)
Application of M³ security concepts to coherent caches
Integration of additional external modules (TUD, …)

Masur27 (planned)

Optimization of data throughput both in the on-chip network and across external interfaces (DDR, PCI, …)
Integration of data-intensive accelerators, such as high-efficiency, high-performance AI accelerators and HPC network protocol processors
Collaboration with the analog design team for secure integration of mixed-signal components such as ADC/DAC converters